Inside the StarGate 323: How the Timing Circuit Works

January 11, 2026

The Ursa Major StarGate 323 is a digital reverb from 1982 that uses a timing circuit to coordinate all of its internal operations. This post breaks down how that circuit works, from the crystal oscillator to the final control signals.

StarGate 323 hardware
StarGate 323 hardware

The Big Picture

The timing circuit generates 16 control signals that orchestrate everything else in the system: memory access, address sequencing, and more. These signals follow a precise 256-step pattern that repeats continuously. One signal in particular—TCB1—is key to understanding how the StarGate creates its reverb, as it drives the delay system that we'll explore at the end of this post.

Rather than using logic gates to derive these signals, the designers took a clever approach: they pre-computed the entire sequence and stored it in PROMs. The circuit simply counts from 0 to 255 and uses each count value to look up the corresponding control byte.

To understand how this circuit works, I built a simulation in Logisim Evolution. The animation below shows the circuit running—watch the counter increment while the control signals flip on and off.

Timing circuit simulation built in Logisim Evolution
Timing circuit simulation built in Logisim Evolution

Signal Flow

The timing circuit follows a straightforward pipeline:

  • Crystal Oscillator (U65) generates an 8.192 MHz clock signal (8.192 MHz / 256 steps = 32 kHz sample rate)
  • Timing Counters (U52, U53) count from 0-255 on each clock pulse
  • Timing PROMs (U46, U47) output the control byte stored at the current count
  • Latches (U42, U43) capture and hold the PROM outputs as stable control signals

Each clock tick advances the counter, which changes the PROM address, which outputs a new control byte, which updates the control signals. The entire cycle takes 256 clock ticks, then repeats.

CLOCK0COUNTER000PROMTCB1BINARY CLOCKCOUNTER (0-255)LOOKUPSIGNAL

The clock is slowed down here—in the actual hardware it runs at 8.192 MHz. The counter cycles through 256 PROM addresses, each outputting 8 control signals. TCB1 is one of these signals, programmed to pulse approximately 15 times per cycle.

The Counter Chain

Two 74LS163 4-bit counters are chained together to form an 8-bit counter. U53 handles the low nibble (bits 0-3) and U52 handles the high nibble (bits 4-7).

The chain works through the carry output: U53 counts 0 through 15, and when it rolls over from 15 to 0, its carry output (C15) pulses high. This carry signal connects to U52's enable inputs (ENP and ENT), causing U52 to increment only when U53 overflows.

The result is an 8-bit count from 0 to 255. The eight output lines (TC0-TC7) connect directly to the address inputs of both timing PROMs.

The Timing PROMs

Two 28L22 PROMs (256 x 8-bit) hold the pre-programmed control sequences. Each PROM contains 256 bytes, and each bit of each byte controls one signal. Together they produce 16 control signals—including TCB1—that orchestrate the entire system.

Signal Frequencies

Analyzing the PROM data reveals how often each signal transitions during one 256-step cycle. The signal that matters most for understanding the reverb is TCB1. It pulses about 15 times per cycle, and each pulse advances the slot counter that addresses the delay PROM. This is the clock that drives the delay tap sequencing—the core of how the StarGate reads back delayed audio at specific tap positions.

Original StarGate 323 schematic (Sheet 5) showing the timing circuit
Original StarGate 323 schematic (Sheet 5) showing the timing circuit

Why Use PROMs Instead of Logic?

The PROM approach lets the designers encode precise timing relationships that would require complex logic gates to generate otherwise. With 512 bytes total, they could specify exactly what should happen at every step without debugging state machines.

This matters for TCB1 especially. The slot counter it drives needs to advance at precisely the right moments. That relationship is baked directly into the bit patterns—the designers simply programmed the exact sequence they needed.

StarGate PROM chips
StarGate PROM chips

Following TCB1 to the Delay System

TCB1 pulses approximately 15 times per 256-step cycle. Each pulse advances the DAC slot address counter (U72 and U73 in the schematic), which in turn addresses the delay PROM. The delay PROM contains the tap positions—the specific memory addresses where the system reads back delayed audio samples.

This is the heart of how the StarGate creates reverb: the timing circuit generates TCB1 pulses, TCB1 advances the slot counter, the slot counter addresses the delay PROM, and the delay PROM tells the system where to read from the audio memory. The pattern of tap positions stored in the delay PROM defines the reverb character.

In the next post, I'll trace this signal path further and explore how the delay system uses these tap positions to create the StarGate's signature sound.

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